TechLead Corporation

Packaging, Interconnection & Assembly

 
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Embedded Component Course Offered

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Blurring the Line between Packaging & Assembly: Embedded Components

Location

SMTAI 2009, San Diego, California, October 2009

Overview

Embedding active and passive components in the interconnect substrate offers improved performance by cutting interconnect parasitics, reliability gains by eliminating wire-bonds and solder-bumps, and reduced cost and size by parts list reduction. Like every new development, these benefits come at a price: disrupted logistics, yield management concerns, and limited rework and repair options.

This course covers the application and implementation of commercial and developmental technologies to embed active as well as passive components. Topics include advanced material options, die contact metallurgy and processes, embedded chip packaging, and options for embedded passives. Solutions include ceramic-based (thick film, LTCC, and HTCC) and organic-based (PWB, flex, and thin film) systems Examples of specific embedded component structures, including Verdant’s Occam and Freescale’s RCP technologies, demonstrate both the power and limitations of these approaches.

Further considerations for embedded components include yield management strategies, WEEE and ROHS concerns, system reliability, and supply chain restructuring. The course concludes by reviewing the drivers behind embedded active and passive components and analysis of multiple examples of today’s real life embedded component applications.

Topics

  • Embedded Component Drivers & Trends
  • Embedding Active Components
    • Bare Die
    • Packaged Die
  • Embedding Passive Components
    • Discrete Passives
    • Integral Passives
  • Commercial & Developmental Applications
  • Technical & Business Implications for SMT Assemblers
    • Process Changes & Revised Yield Management Strategies
    • Supply Chain Shift & Value Capture Opportunities
  • Cost Analysis for Embedded Components
  • Embedded Packaging Intellectual Property Landscape

 

Who Should Attend?

This course covers basic and advanced topics for product and design engineers, manufacturing process and assembly/packaging engineers, engineering managers, senior design technicians, consultants and academic specialists as well as marketing and sales personnel requiring an understanding of the capabilities, implications and options of embedded active and passive component technologies.

Instructor Bio:

Herbert J. Neuhaus, Ph.D. serves as Director of Operations at TechLead Corporation supporting clients around the world in the areas of intellectual property management and valuation, technical cost modeling as well as developing advanced strategic planning tools. Active since 1980 in the development and characterization of electronic materials and associated manufacturing processes for a wide variety of applications including flip-chip for RFID and Smart Cards, LED assembly, chip interconnect and passivation, multichip modules, printed wiring boards, and flat panel displays, Dr. Neuhaus synthesized a unique perspective on electronics packaging, interconnection and assembly industry.

Dr. Neuhaus received his Ph.D. degree in Reliability Physics from the Massachusetts Institute of Technology and the prestigious distinction of Fellow of the Society of the International Microelectronics and Packaging Society (IMAPS). He currently chairs the materials subcommittee of the IMAPS National Technical Committee and serves on the Board of Vyta Corp.

Last Updated ( Saturday, 27 June 2009 06:28 )
 

3D Packaging Course Offered

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3 Dimensional Assembly, Packaging & Integration

Location

SMTAI 2009, San Diego, California, October 2009

Overview

The latest trend in miniaturization of electronics systems, 3D assembly and packaging of both active and passive devices opens a new world of performance and integration to system designers.  This course covers both the fundamental and advanced technologies in use today to produce stacked chip packages as well as stackable packages for implementation of highly integrated mobile electronic products.  These include the challenges of die thinning, thin die attach, multi-level wire bonding, mixed technology die attachment and bonding, flip chip, TAB and TSV (Through Silicon Via) technologies.  Substrate selection for various 3D packaging techniques including silicon tiles, flex circuit origami and specialty interposers concludes the chip stacking section of the course.  Several examples of specific 3D package structures demonstrate both the power and limitations of these approaches.

Further considerations for 3D electronics include stackable packages based on flex and rigid substrate approaches, integrated system in package (SiP) techniques and multilayer, embedded passive technologies.  Additional coverage of SMT design and assembly implications rounds out the technical content of the course. The course concludes with a review of the drivers behind 3D packaging and presentation of multiple examples of 3D packages in actual usage today.

Topics

  • 3D Package Trends
  • 3D Package Applications
  • Stacked Packages
    • Package on Package
    • Origami
    • Edge Stacked Modules
  • Die Stacking
    • Wire Bond
    • Mixed Technology
    • Edge Redistribution
    • Through Silicon Vias
  • 3D Integration (SiP)
  • Issues in 3D Integration
  • SMT Assembly Implications
  • Drivers for 3D Packaging
  • Intellectual Property Landscape for 3D Packaging

Who Should Attend?

This course covers basic and advanced topics for product and design engineers, manufacturing process and assembly/packaging engineers, engineering managers, senior design technicians, consultants and academic specialists as well as marketing and sales personnel requiring an understanding of the capabilities, implications and options of 3D packaging and assembly technologies.

Instructor Biography

Charles E. Bauer, Ph.D. serves as Senior Managing Director of TechLead Corporation, a technology management company specializing in the electronics packaging, interconnection and assembly industry.  Dr. Bauer focuses in the areas of strategic technology planning, market analysis and business development, primarily in the international arena.  With more than 30 years experience spanning the range from printed circuit board and hybrid fabrication through complex IC metallization, multilayer packaging, multichip modules (MCMs) and flat panel display packaging and assembly he brings tremendous breadth and depth to his work.  Dr. Bauer lectures throughout the world on technology, business and market topics as well as serving on several corporate boards and international corporate, government and educational institution advisory councils.

Chuck served ISHM as President of the NW Chapter, Technical Chair of the ISHM National Symposium in Seattle, National Technical Vice President of the Society and President of the Rocky Mountain Chapter.  He founded the ISHM/IMAPS Advanced Technology Workshop program and served as General or Technical chair for several ATWs between 1990 and 1998.  Founder of the Pan Pacific Microelectronics Symposium, Dr. Bauer also served on the Board of Directors of the SMTA from 1997 through 2001 when elected President of IMAPS for 2001-2002.  He now serves as Chair of the SMTA International Development Committee and remains active internationally with the SMTA, IEEE, IMAPS, JIEP and ASM.

Last Updated ( Saturday, 27 June 2009 06:29 )
 

The IP Landscape for Photovoltaics

Forum: ESTC 2008

Charles E. Bauer, Ph.D., Herbert J. Neuhaus, Ph.D.

Abstract:  The photovoltaic industry, originally established in the 1950s, remains far from financial parity with conventional energy sources. Nevertheless the intellectual property (IP) aspects of this field already encompass more than 3000 patents in the US alone not including a wide variety of enabling technologies not directly identified as photovoltaic! The authors review the relevant IP and organize it by generic technology categories. A unique mapping methodology provides greater understanding of the landscape of IP in the photovoltaic arena across a wide range of considerations including geography, IP development and ownership trends, infrastructure implications and application concepts. Finally, the authors also present a rudimentary valuation of IP within the photovoltaic field based on citation analysis.

Last Updated ( Friday, 22 August 2008 11:40 )
 

Global Outsourcing -- Winning Strategy for Vietnam: Imitation to Innovation

Charles E. Bauer, Ph.D., Herbert J. Neuhaus, Ph.D.

Outline:

  • Global Outsourcing
    • Drivers
    • Trends
    • Challenges
  • Lessons From Abroad
    • Taiwan
    • Korea
    • Singapore
    • China
    • India
  • Developing Vietnam's Opportunity
    • SWOT Analysis
    • Winning Strategies

 

 

Last Updated ( Friday, 22 August 2008 12:00 )
 

Contact Information

Chuck Bauer
TechLead Corporation
4120 NW Niblick Place
Portland, OR 97229
+1-303-674-8202
e-mail: Chuck Bauer
Skype Me™!

Ray Fillion
TechLead Corporation
31 Chestnut Lane
Niskayuna, NY  12309
+1-518-810-1519
e-mail: Ray Fillion
Skype Me™!

Herb Neuhaus
TechLead Corporation
770 Maroonglen Court
Colorado Springs, CO 80906
+1-719-210-1040
e-mail: Herb Neuhaus
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